08.04.15
Nantero announced the appointment of industry veteran Dr. Shang-Yi Chiang to its Advisory Board. Dr. Chiang was previously an EVP, co-COO and SVP of R&D at TSMC before announcing his retirement in October 2013. In addition, Nantero also announced the hiring of Lee Cleveland, formerly in charge of flash design at Spansion and AMD, as the company’s new VP of design responsible for leading Nantero’s complete chip design team.
“This added expertise will be instrumental in helping the company deliver a new generation of memory with the unique properties of DRAM-like speed, nonvolatility and ultra-high-densities, for both standalone and embedded use,” said Greg Schmergel, co-founder, CEO and president of Nantero.
With more than 40 years experience in the semiconductor industry, Dr. Chiang has contributed to the research and development of CMOS, NMOS, Bipolar, DMOS, SOS, SOI, GaAs lasers, LED, E-Beam lithography, and silicon solar cells. While at TSMC, his R&D team set milestones in semiconductor technology in the 0.25 micron, 0.18 micron, 0.15 micron, 0.13 micron, 90nm, 65nm, 40nm, and 28nm generations, and this team continues to extend to the 20nm, 16nm FinFET, and 10nm generations. Under his leadership, TSMC rose to become a semiconductor technology leader with its R&D organization growing from 148 to 4,000 people, while annual R&D spending rising from $80 million to $1.6 billion.
“Nantero’s next generation NRAM memory has the potential to be a game-changer in both standalone and embedded memory,” said Dr. Chiang.
Cleveland has already recruited a world-class design team with experience in both high-density DRAM and flash design. This team is currently working on exciting new product designs, including multi-gigabyte high speed DDR4-compatible nonvolatile standalone memories.
Before joining Nantero, Cleveland was in charge of flash design at AMD and Spansion, where he was responsible for multiple generations of shipping memory products. He has also served as SVP of engineering at Sipex and Exar, as well as VP of engineering and COO at Kilopass.
“This added expertise will be instrumental in helping the company deliver a new generation of memory with the unique properties of DRAM-like speed, nonvolatility and ultra-high-densities, for both standalone and embedded use,” said Greg Schmergel, co-founder, CEO and president of Nantero.
With more than 40 years experience in the semiconductor industry, Dr. Chiang has contributed to the research and development of CMOS, NMOS, Bipolar, DMOS, SOS, SOI, GaAs lasers, LED, E-Beam lithography, and silicon solar cells. While at TSMC, his R&D team set milestones in semiconductor technology in the 0.25 micron, 0.18 micron, 0.15 micron, 0.13 micron, 90nm, 65nm, 40nm, and 28nm generations, and this team continues to extend to the 20nm, 16nm FinFET, and 10nm generations. Under his leadership, TSMC rose to become a semiconductor technology leader with its R&D organization growing from 148 to 4,000 people, while annual R&D spending rising from $80 million to $1.6 billion.
“Nantero’s next generation NRAM memory has the potential to be a game-changer in both standalone and embedded memory,” said Dr. Chiang.
Cleveland has already recruited a world-class design team with experience in both high-density DRAM and flash design. This team is currently working on exciting new product designs, including multi-gigabyte high speed DDR4-compatible nonvolatile standalone memories.
Before joining Nantero, Cleveland was in charge of flash design at AMD and Spansion, where he was responsible for multiple generations of shipping memory products. He has also served as SVP of engineering at Sipex and Exar, as well as VP of engineering and COO at Kilopass.