12.07.15
Imec and Coventor announced the expansion of a joint development project to explore process variation issues in 7nm semiconductor technology.
For over a year, the joint team has been using Coventor’s semiconductor process modeling platform, SEMulator3D, to perform predictive modeling of semiconductor fabrication processes and to analyze process variation issues in 7nm semiconductor technology. The collaboration has now been expanded beyond logic-only devices to include 3D NAND Flash, STT-MRAM and other device types.
“Our joint collaboration is helping the entire semiconductor industry lower the risks associated with moving to the latest process technologies by providing customers with proven, tested process development platforms and advancing the availability, yield and cost of next-generation semiconductor technology,” said An Steegen, SVP of process technology at imec.
A highlight of the collaboration has been a massive process simulation experiment to explore the effect of process variability in 7nm BEOL (back end of line) fabrication processes. Researchers used SEMulator3D to simulate an entire window of process variability, which would have required more than one million actual semiconductor wafers if conventional testing methods were used.
“By providing our customers with a comprehensive virtual fabrication environment, plus our combined expertise, Coventor and imec are reducing the time and cost associated with moving to these emerging semiconductor nodes,” added David Fried, CTO at Coventor.
For over a year, the joint team has been using Coventor’s semiconductor process modeling platform, SEMulator3D, to perform predictive modeling of semiconductor fabrication processes and to analyze process variation issues in 7nm semiconductor technology. The collaboration has now been expanded beyond logic-only devices to include 3D NAND Flash, STT-MRAM and other device types.
“Our joint collaboration is helping the entire semiconductor industry lower the risks associated with moving to the latest process technologies by providing customers with proven, tested process development platforms and advancing the availability, yield and cost of next-generation semiconductor technology,” said An Steegen, SVP of process technology at imec.
A highlight of the collaboration has been a massive process simulation experiment to explore the effect of process variability in 7nm BEOL (back end of line) fabrication processes. Researchers used SEMulator3D to simulate an entire window of process variability, which would have required more than one million actual semiconductor wafers if conventional testing methods were used.
“By providing our customers with a comprehensive virtual fabrication environment, plus our combined expertise, Coventor and imec are reducing the time and cost associated with moving to these emerging semiconductor nodes,” added David Fried, CTO at Coventor.