Imec Expands Collaboration with TEL on Next-Generation Memory

Posted on November 12, 2012 @ 03:24 am

Imec announced today that Tokyo Electron (TEL) and imec have further extended their collaboration. The new agreement comprises joint R&D on advanced STT-MRAM (spin-transfer torque magnetoresistive random access memory) within imec’s R&D program on emerging memory technologies.

The collaboration between imec and TEL on STT-MRAM technology is an excellent opportunity for TEL to accelerate the development of its next-generation etch tools for high-density emerging memory technologies. As part of the collaboration, TEL’s Tactras etch tool has been installed in imec’s 300mm clean room, complementing imec’s 300mm dedicated STT-MRAM tool set.

The Tactras tool enables imec and TEL to jointly develop the patterning processes for high-density STT-MRAM technology. The tool is designed for in-situ cluster patterning of the Magnetic Tunnel Junction (MTJ) stack, which is key for advanced memory technology nodes.

“We are pleased to intensify our collaboration with TEL, as it is a confirmation of the value imec offers to its industrial partners,” stated Laith Altimime, director CMOS technology at imec. “As a globally operating R&D center, imec is addressing a real need of the semiconductor industry. We offer the technology platforms to our global partners and enable close interaction with all companies in our partner eco system and sharing expertise and knowledge across the value chain. This enhances the process of innovation benefiting from a cost-sharing and risk-sharing basis.”

“TEL is pleased to further strengthen the collaboration with imec, a known leader in the area of advanced semiconductor material and device R&D on state-of-the-art process equipment,” stated Dr. Akihisa Sekiguchi, vice president and general manager of SPE marketing at Tokyo Electron Limited. “Imec offers a unique research environment which has proved very valuable as an extension of our own internal R&D.”


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