12.18.15
At the IEEE International Electron Devices Meeting 2015, imec presented three novel aluminum gallium nitride (AlGaN)/gallium nitride (GaN) stacks featuring optimized low dispersion buffer designs. IMEC optimized the epitaxial p-GaN growth process on 200mm silicon wafers, achieving e-mode devices featuring beyond state-of-the-art high threshold voltage (Vt) and high drive current (Id).
To achieve a good, current-collapse-free device operation in AlGaN/GaN-on-Silicon (Si) devices, dispersion must be kept to a minimum. Trapped charges in the buffer between the GaN-based channel and the silicon substrate are known to be a critical factor in causing dispersion.
Imec compared the impact of different types of buffers on dispersion and optimized three types: a classic step-graded buffer, a buffer with low-temperature AlN interlayers, and a super lattice buffer. These three types of buffers were optimized for low dispersion, leakage and breakdown voltage over a wide temperature range and bias conditions.
Imec also optimized the epitaxial p-GaN growth process demonstrating improved electrical performance of p-GaN HEMTs, achieving a beyond state-of-the-art combination of high threshold voltage, low on-resistance and high drive current (Vt >2V, RON = 7 Ω.mm and Id >0.4A/mm at 10V).
Imec’s GaN-on-Si R&D program aims at bringing this technology towards industrialization. Imec’s offering includes a complete 200mm CMOS-compatible 200V GaN process line.
To achieve a good, current-collapse-free device operation in AlGaN/GaN-on-Silicon (Si) devices, dispersion must be kept to a minimum. Trapped charges in the buffer between the GaN-based channel and the silicon substrate are known to be a critical factor in causing dispersion.
Imec compared the impact of different types of buffers on dispersion and optimized three types: a classic step-graded buffer, a buffer with low-temperature AlN interlayers, and a super lattice buffer. These three types of buffers were optimized for low dispersion, leakage and breakdown voltage over a wide temperature range and bias conditions.
Imec also optimized the epitaxial p-GaN growth process demonstrating improved electrical performance of p-GaN HEMTs, achieving a beyond state-of-the-art combination of high threshold voltage, low on-resistance and high drive current (Vt >2V, RON = 7 Ω.mm and Id >0.4A/mm at 10V).
Imec’s GaN-on-Si R&D program aims at bringing this technology towards industrialization. Imec’s offering includes a complete 200mm CMOS-compatible 200V GaN process line.